1. Field of the Invention
The present invention relates general to a display apparatus implemented with a spatial light modulator. More particularly, this invention relates to an improved pixel element configuration manufactured with DRAM for each pixel element to reduce production cost and further manufacturing the spatial light modulator with more compact size and improved performance characteristics.
2. Description of the Related Art
After the dominance of CRT technology in the display industry for over 100 years, Flat Panel Displays (hereafter FPD) and Projection Displays have gained popularity because the FDP display implements a more compact image projecting system while projecting images on a larger display screen. Of several types of projection displays, projection displays using micro-displays are gaining recognition among consumers because of their high picture quality and a lower cost than FPDs. There are two types of micro-displays used for projection displays on the market, i.e., micro-LCDs (Liquid Crystal Displays) and micromirror technology. Because the micromirror devices display images with an unpolarized light, the images projected by the micromirror device have a brightness superior to that of micro-LCDs, which use polarized light.
Even though there have been significant advances made in recent years in the technologies of implementing electromechanical micromirror devices as spatial light modulators (SLM), there are still limitations and difficulties when they are employed to display high quality images. Specifically, when the display images are digitally controlled, the quality of the images is adversely affected because the images are not displayed with a sufficient number of gray scale gradations.
Electromechanical micromirror devices have drawn considerable interest because of their application as spatial light modulators (SLMs). A spatial light modulator requires an array of a relatively large number of micromirrors and each of these micromirrors are controlled for modulating and projecting a display pixel. Depending on the resolution requirements of the displayed images, the number of required micromirrors ranges from 60,000 to several million for each SLM.
In FIG. 1A, a digital video system 1 includes a display screen 2 disclosed in a relevant U.S. Pat. No. 5,214,420. A light source 10 is used to generate light beams to project illumination for the display images on the display screen 2. The light 9 projected from the light source is further concentrated and directed toward lens 12 by way of mirror 11. Lenses 12, 13 and 14 form a beam columnator operative to columnate the light 9 into a column of light 8. A spatial light modulator 15 is controlled by a computer through data transmitted over data cable 18 to selectively redirect a portion of the light from path 7 toward lens 5 to display on screen 2. FIG. 1B shows a SLM 15 that has a surface 16 that includes an array of switchable reflective elements 17, 27, 37, and 47; each of these reflective elements is attached to a hinge 30. When the element 17 is in an ON position, a portion of the light from path 7 is reflected and redirected along path 6 to lens 5 where it is enlarged or spread along path 4 to impinge on the display screen 2 to form an illuminated pixel 3. When the element 17 is in an OFF position, the light is reflected away from the display screen 2 and, hence, pixel 3 is dark.
The on-and-off states of the micromirror control scheme as that implemented in the U.S. Pat. No. 5,214,420, and in most conventional display systems, impose a limitation on the quality of the display. Specifically, applying the conventional configuration of a control circuit limits the gray scale gradations produced in a conventional system (PWM between ON and OFF states) limited by the LSB (least significant bit, or the least pulse width). Due to the ON-OFF states implemented in the conventional systems, there is no way of providing a shorter pulse width than the duration represented by the LSB. The least intensity of light, which determines the gray scale, is the light reflected during the least pulse width. The limited levels of the gray scale lead to a degradation of the display image.
Specifically, FIG. 1C exemplifies, as related disclosures, a circuit diagram for controlling a micromirror according to U.S. Pat. No. 5,285,407. The control circuit includes memory cell 32. Various transistors are referred to as “M*” where “*” designates a transistor number and each transistor is an insulated gate field effect transistor. Transistors M5, and M7 are p-channel transistors; transistors, M6, M8, and M9 are n-channel transistors. The capacitances, C1 and C2, represent the capacitive loads in the memory cell 32. The memory cell 32 includes an access switch transistor M9 and a latch 32a based on a Static Random Access switch Memory (SRAM) design. All access transistors M9 on a Row line receive a DATA signal from a different Bit-line 31a. The particular memory cell 32 is accessed for writing a bit to the cell by turning on the appropriate row select transistor M9, using the ROW signal functioning as a Word-line. Latch 32a consists of two cross-coupled inverters, M5/M6 and M7/M8, which permit two stable states, that include a state 1 when Node A is high and Node B is low and a state 2 when Node A is low and Node B is high.
FIG. 1A shows the operations of the switching between the dual states, as illustrated by the control circuit, to position the micromirrors in an ON or an OFF angular orientation. The brightness, i.e., the gray scales of a digitally controlled image system is determined by the length of time the micromirror stays in an ON position. The length of time a micromirror is in an ON position is controlled by a multiple bit word.
Meanwhile, U.S. Pat. No. 5,083,857 has disclosed a technique of fixing a micromirror to a torsion hinge in a layer that is different from the layer in which the micromirror is formed, by way of a beam support post, thereby attempting to enlarge the moving range of the micromirror and to reduce the pixel size.
However, in these conventional techniques, if each pixel is equipped with Static Random Access Memory (SRAM) and if an ON/OFF control for the pixel is performed together with the bias-driving of the micromirror, there will be a technical problem in that one piece of SRAM requires at least five transistors, which need to be accommodated in the region of the pixel. Consequently, the size of the pixel cannot be reduced, resulting in increasing the size of a silicon substrate (i.e., a chip size) with an increase in the number of required pixels. This in turn increases the cost of a display device while making it difficult to reduce the size of a display apparatus.
It is also possible to reduce pixel size with a three-dimensional layout, in which a plurality of transistors is placed in layers in the vertical direction. However, this technique increases the number of masks in the photolithography process and thus complicates the production process and increases the cost of the display device.
Furthermore, for a high definition and high density pixel configuration, wirings used for controlling transistors cannot be made thick enough, and consequently, the drive speed of the transistors, that is, the micromirror, is reduced due to stray capacitance and wiring resistance. Thus the performance of the display device is not improved.